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Course: Introduction to FPGAs (with the Xilinx 7-series FPGAs)

Posted by Florent -

Introduction

The first commercially viable Field Programmable Gate Array (FPGA), named XC2064, has been invented in 1985 by Ross Freeman and Bernard Vonderschmitt, the Xilinx co-founders.

Ross Freeman and	Bernard Vonderschmitt -
			the two inventors of the FPGA

Figure 1 - Ross Freeman (left) and Bernard Vonderschmitt (right),
the two inventors of the FPGA

Nowadays FPGAs are used in a lot of various applications such as Aerospace and Defense, Automotive, Broadcast, Consumer Electronics, Data Center, Industrial, Medical or Communications. The leading FPGA vendors are Xilinx, Altera, Lattice and Microsemi. The FPGA market is estimated to reach 9.88 billion USD by 2020.

What is a FPGA?

A FPGA is a semiconductor Integrated Circuit (IC) device on which the function can be defined after manufacturing (“in the field”) using software-like languages (ex: VHDL, Verilog). Contemporary FPGAs can be reconfigured at any times.  Xilinx 7 series FPGAs store their customized configuration in SRAM-type internal latches.

Conceptual structure of an FPGA device

Figure 2 - Conceptual structure of an FPGA device

A FPGA contains a two dimensional array of Configurable Logic Blocks (CLBs), Input Output Blocs (IOB) and programmable switches. The Figure 2 shows a conceptual structure of a FPGA device.

A CLB can be configured (i.e. programmed) to perform a simple function [1]. The CLBs are connected between each other using the programmable switches. All the elements of an FPGA are configured using a Bitstream (which is usually a .bit file).

Structure of the Xilinx 7series FPGAs Configurable Logic Blocs (CLBs)

CLBs are the main logic resources for implementing sequential as well as combinatorial circuits. Each CLB element is connected to a switch matrix for access to the general routing matrix. A CLB element contains a pair of slices” [2]. Slices are the fundamental building blocks of an FPGA, containing LUTs and registers. In the Xilinx 7series FPGAs, there are two types of slices: SLICEM and SLICEL. All slices contain four 6-inputs LUTs, eight registers, wide multiplexers and a carry chain. The Figure 3 shows the structure of the Xilinx 7series FPGAs CLBs.

CLB overview

Figure 3 - CLB overview (source: [2])

Look-Up Table (LUT)

A Look-Up Table (LUT) can implement any arbitrary function of its inputs and can be cascaded to other LUTs to perform more complex functions [3]. A common terminology is to refer to an n-input LUT as an n-LUT. For example, a LUT with 6 inputs will be referred as a 6-LUT.

Structure of the 6-LUTs in the Xilinx	7-series FPGAs

Figure 4 - Structure of the 6-LUTs in the Xilinx 7-series FPGAs

The Xilinx 7series FPGAs use 6-LUT with six independent inputs (A1 to A6) and two independent outputs (O5 and O6) [2]. As shown in the Figure 4, each 6-LUT of the Xilinx 7-series FPGAs can be used as 1 6-LUT or can be configured as 2 5-LUTs [4]. LUTs can implement:

· Any arbitrarily defined six-input Boolean function

· Two arbitrarily defined five-input Boolean functions, as long as these two functions share common inputs

· Two arbitrarily defined Boolean functions of 3 and 2 inputs or less

Wide Multiplexers

The multiplexers in the Xilinx 7-series FPGAs CLB slices can be used with the LUTs to implement these functions:

· 4:1 multiplexers using one LUT (up to four 4:1 MUXes per slice)

· 8:1 multiplexers using two LUTs (up to two 8:1 MUXes per slice)

· 16:1 multiplexers using four LUTs (up to one 16:1 MUXes per slice)

Each LUT can be configured into a 4:1 MUX. As shown in the Figure 5, each F7MUX combines the outputs of two LUTs together (to implement an arbitrary 7-input function or an 8:1 multiplexer) and the F8MUX combines the outputs of two F7MUXes together (to implement an arbitrary 8-input function or a 16:1 multiplexer) [4].

16:1 Multiplexer in a Xilinx 7-Series Slice

Figure 5 - 16:1 Multiplexer in a Slice (source: [2])


Bibliography

[1]

P. P. Chu, Embeddded SoPC Design With NIOS II Processor and VHDL Examples, Cleveland: John Wiley & Sons, 2011.

[2]

Xilinx, “UG474 (v1.7) - 7 Series FPGAs CLB User Guide,” 2014.

[3]

D. G. Bailey, Design for embedded image processing on FPGAs, Singapore: John Wiley & Sons, 2011.

[4]

Xilinx, “7-Series CLB Architecture,” [Online]. Available: http://www.xilinx.com/video/fpga/7-series-clb-architecture.html.

[5]

R. Dubey, Introduction to Embedded System Design Using Field Programmable Gate Arrays, London: Springer, 2009.